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ENGINEERED FOR THE LAST MILE OF CHIP DESIGN

Change the netlist.
Keep the intent.

Move from design change to verified ECO with GOF. Create targeted patches, work within physical constraints, and check logic equivalence in one connected workflow.

Available now GOF 11.9Release notes

THE GOF WORKFLOW
From intent to implementation
Illustrative netlist patch DFFDFFAND
Illustrative netlist patch
  1. 01
    Design changeRTL · netlist · constraints
  2. 02
    Targeted ECOAnalyze · patch · map
  3. 03
    VerificationLogic equivalence checking

A traceable path from change to patch.

Functional ECOMetal-only ECOLogic equivalenceAI-assisted debug

ONE CONNECTED PLATFORM

Precision at every stage of change.

ECO, verification, and debug tools built around the same gate-level design. Start with the capability your flow needs.

01

GOF ECO

Create functional patches with RTL-guided, script-driven, and spare-cell ECO flows.

02

GOF AI

Turn natural language requests into GOF scripts and bring AI assistance to ECO and debug.

03

GOF Debug

Trace logic in incremental schematics and investigate non-equivalent points.

TECHNICAL RESOURCES

Look inside the methodology.

WORKED EXAMPLE

From hours to minutes

Examine the benchmark, generated patch, and stage-by-stage replay workflow.

See the benchmark

GOF AI

Your agentic CLI, connected to GOF

See how the GOF AI Skill connects your CLI platform to GOF engines through a server and gof -run client.

Read the integration guide

Ready to go deeper?

Find setup instructions, API details, and practical examples in the GOF user manual.

Open the documentation

LET’S WORK THROUGH YOUR ECO

Bring your next design change.

Discuss your design stage, constraints, and verification goals with a NanDigits engineer.

Request an evaluation